Curated Collections
HDL Simulation & Verification Tools
Tools for simulating and verifying hardware description languages (HDL) such as Verilog and SystemVerilog, offering cycle-accurate simulation and linting capabilities for digital design verification.
by The Linux Foundation
・7 projects ・ Updated 14 Mar 2025
Project
Contributors
Organizations
Software value
1,416
243
$20M
956
178
$39M
635
154
$12M
379
58
$23M
200
20
$6.7M
29
10
$1.3M
0
0
$0